Site Index
   Support Home
   C6000 Home
   DaVinci EVM
   Ordering Info.

C6000 Site
Support Site
Main Site

Davinci EVM FAQ

Hardware Topics Firmware Topics Software Topics Errata

Default Configuration Switch Settings(10/27/06)
Here is the default shipping configuration the DaVinci board is sent out as. If you are in a PAL region, move switch #10 to the ON position

JTAG Adapters (05/15/06)
The DaVinci EVM uses a 1.8V 20-pin JTAG header. This is different than the standard 3.3V 14-pin standard JTAG header normally found on our development boards. The appropriate JTAG adapter to use is:

Scan Chain Setup (05/15/06)
In order to support the DM6446, switches for EMU0, EMU1, and TRSTn pins should be set as illustrated:

For DM6446 JTAG support:
S1: EMU0 set to HIGH (H)
S1: EMU1 set to HIGH (H)

S2: TRSTn set to LEFT ( ).
S2: TRSTn set to LEFT ( ).

Depending on IcePick support, setup the JTAG scan chain through Setup CCStudio as follows:

For IcePick support:
> IcePick
> Subnode 1: Port 16
> ARM9
> Subnode 2: Port 18
> C64x+

For IcePick in BYPASS mode:
> BYPASS_6(IcePick)
> ARM9

JTAG Emulation Setup (08/11/06)
To allow your XDS510/XDS560 emulator to connect the DaVinci EVM, you must first disable U-boot on DaVinci. The shipping configuration is set to have U-boot booting from NOR Flash, with the DSP disabled, running the TI DaVinci demo from the mounted hard drive.

To stop booting from U-boot, move S3-1 & S3-2 to the OFF-OFF position, make sure J4 is still on FLASH. To have the DSP boot on Reset, move S3-4 to the ON position.

UART1 Signals Blocked by CPLD (10/1/07)
The CPLD firmware on the current DaVinci EVM has a bug which inhibits the UART1 signals between the DaVinci CPU and the UART1 header. If you want to use UART1, please download the CPLD project from the DaVinci EVM support page and change the following three lines in muxctrlr.vhd from:

    --V33_UART_TXD1       <= UART_TXD1_DMACK  when SelATA = '0' else '1';
    --UART_RXD1_DMARQ     <= V33_UART_RXD1    when SelATA = '0' else V33_ATA_DMARQ;
    UART_RXD1_DMARQ     <= '1'    when SelATA = '0' else V33_ATA_DMARQ;


    V33_UART_TXD1       <= UART_TXD1_DMACK  when SelATA = '0' else '1';
    UART_RXD1_DMARQ     <= V33_UART_RXD1    when SelATA = '0' else V33_ATA_DMARQ;
    --UART_RXD1_DMARQ     <= '1'    when SelATA = '0' else V33_ATA_DMARQ;

Rebuld the project and reprogram your CPLD.

I2C Usage (08/29/06)
The MSP430 (used for the Infrared Remote Control interface, Real Time Clock, and Media Card Detector) acts as an I2C slave device, by using a software I2C implementation. This type of software implementation limits the I2C clock to roughly 20 KHz. A faster I2C clock can cause the MSP430 to lock up the I2C bus, preventing further communication with other devices on the bus. Other requirements are as follows:

I2C communication on the DaVinci EVM should be limited to:

  • Maximum speed of 20 kHz
  • 100 microseconds delay between consectutive I2C transactions.
  • 50-50 duty cycle, where CLK HIGH time is equal to CLK LOW time.
Failure to do so may result in the MSP430 locking up the I2C bus.

Infrared Remote (05/15/06)
The MSP430 based infrared remote interface uses a Philips RC5 coded format. The remote being shipped and used for validation is a Philips PM4S universal remote with the TV function programmed using code 020.

Code Settings (front) | Code Settings (back) | Code Settings (front + back in PDF)

MSP430 GPIO Pins (05/15/06)
The MSP430 has two output pins (P3.0 and P3.3) that control board functions. These pins can be controlled through the MSP430's I2C command set.

  • P3.0 is the SmartMedia chip enable where 0 = active, 1 = inactive (default).
  • P3.3 is the CompactFlash power enable where 0 = inactive (default), 1 = active.

DSP Based Corruption of ARM Code (05/15/06)
Many users who are trying to run operating systems on the ARM have run into intermittent problems caused by the DSP being released from reset at board powerup. Since there is no code for the DSP to run, it starts trying to execute garbage code and in many cases overwrite either memory or peripheral state associated with the ARM. This often shows up as memory failures, Flash memory programming failures, Ethernet failures or cases where one board will appear to work but another one won't. However, since the behaviour is uncharacterized, it can manifest itself in jus about any situation.

Switch S3-4 controls the DSP behavior

For no DSP( preferred state ): S3-4 = OFF holds the DSP in reset until the arm releases it. This is the preferred state and will be shipped on all boards released.

For DSP: S3-4 = ON releases the DSP after a system reset.

My Flash program does not load (05/15/06)
See the FAQ entry for "DSP Based Corruption of ARM Code".

Switch S3-1 and S3-2 control the media to boot from.

For Flash: Set S3-1 = ON and S3-2 = OFF to boot from Flash. Move jumper J4 to the FLASH position. ( NOR Flash is a 16-bit memory which requires S3-3 to be in the ON position )

For NAND Flash: Set S3-1:2:3:4 to OFF in order boot from NAND Flash. Move jumper J4 to the NAND position. ( NAND Flash is an 8-bit memory which requires S3-3 to be in the OFF position )

For information on how to load U-boot, head back to the main DaVinci EVM support page, under U-Boot

Where do I get software updates and source code? (07/11/06)
You can find source code for U-Boot and other software updates at:
after you register your EVM.

DaVinciEVM DC1 Pinout Incorrect in TRM (10/27/06)
The pinout for DC1 on page 3-28 of the DaVinci EVM Technical Reference Manual incorrectly listed pin #70 as being connected to the 5V power supply. It is actually connected to the 1.8V power supply. The active TRM on the support page contains the correct version of this pinout.

©Copyright 2002-2013 Spectrum Digital, Inc. All Rights Reserved.